5M40ZE64C4N vs 5M80ZE64C4N 对比
详细并排对比 5M40ZE64C4N 出自 Intel 和 5M80ZE64C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5M40ZE64C4N | 5M80ZE64C4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1.70 | $2.10 |
| Family | MAX V | MAX V |
| Logic Elements (LE) | 32 | — |
| User Flash Memory | 4 Kbit | On-chip (8 Kbits) |
| Pin-to-Pin Delay (tPD1) | 7.5 ns | — |
| Maximum Internal Frequency | 184 MHz | — |
| Number of I/O Pins | 30 (approx.) | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm flash-based CMOS | — |
| Configuration Memory | Non-volatile flash (internal) | Non-volatile flash, instant-on |
| Programmable Pull-up Resistors | Yes (per-pin, internal) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| 工作温度 | 0 °C to +85 °C (commercial) | — |
| 封装 | EQFP-64 (Plastic Enhanced QFP, 64 pins) | 64-pin EQFP (E64) with exposed pad |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL level] |
| RoHS 状态 | Compliant | Compliant (lead-free) |
| Device Logic Elements | — | 64 |
| Number of Macro Cells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 79 |
| Maximum Operating Frequency | — | 184.1 MHz |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Global Clocks | — | 2 |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Speed Grade | — | C4 |
| Hot Socketing | — | Supported |