5M570ZM100C5N vs 5M570ZM100C4N Vergleich
Detaillierter Direktvergleich von 5M570ZM100C5N von Altera und 5M570ZM100C4N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M570ZM100C5N | 5M570ZM100C4N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,80 | $8,74 |
| Product Family | MAX V CPLD | — |
| Series | 5M570Z | 5M570Z |
| Logic Elements / Macro Cells | 440 | — |
| Maximum User I/O Pins | 74 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 9 ns (typical, per datasheet) | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Configuration Memory Type | Non-volatile Flash | — |
| Gehäuse | 100-ball MBGA (Micro FineLine BGA), 0.5 mm pitch | 100-ball MBGA (Micro BGA), tray |
| Betriebstemperatur | 0C to +85C (commercial) | 0 C to +85 C (commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan + ISP | — |
| Programming Interface | JTAG / In-System Programming (Quartus II / Quartus Prime) | JTAG (IEEE 1149.1), in-system programmable |
| RoHS-Status | Compliant | Compliant |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Family | — | MAX V |
| Macro Cells | — | 440 |
| Logic Elements (LEs) | — | 440 |
| Maximum Internal Frequency | — | 184.1 MHz |
| Pin-to-Pin Delay (tPD) | — | 9.0 ns |
| Core Voltage | — | 1.8 V |
| Configuration Memory | — | Non-volatile flash, instant-on |
| User Flash Memory | — | Yes (8 Kbits) |
| Programmable I/O Pins | — | [DATA_NEEDED: I/O pin count for M100 package] |
| I/O Standards | — | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V, PCI |
| Lead-Free | — | Yes |