5M570ZT144A5N vs 5M1270ZT144C5N Vergleich
Detaillierter Direktvergleich von 5M570ZT144A5N von Intel und 5M1270ZT144C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
5M1270ZT144C5N - MAX V CPLD 980 Macrocells 114 I/O TQFP-144 | Intel / Altera
5M1270ZT144C5N ✓ AktivSpezifikationsvergleich
| Parameter | 5M570ZT144A5N | 5M1270ZT144C5N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,40 | $12,45 |
| Family | MAX V | — |
| Series | 5M570Z | MAX V |
| Macrocells | 440 | 980 |
| User I/Os | 114 | 114 |
| Logic Array Blocks (LABs) | 44 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V | — |
| Propagation Delay (tPD) | 17.7 ns | — |
| Maximum User Frequency | [DATA_NEEDED: maximum fMAX] | — |
| Configuration Technology | Non-volatile Flash | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | — |
| In-System Programmability | Yes (via JTAG) | — |
| Standby Current (typical) | 27 µA | — |
| Betriebstemperatur | -40 °C to +125 °C (industrial) | 0 C to +85 C (commercial grade) |
| Gehäuse | TQFP-144 (T144), 0.5 mm pitch, 20 mm × 20 mm | TQFP-144 (22 x 22 mm, 0.5 mm pitch) |
| Process Technology | CMOS | — |
| Montageart | Surface Mount | Surface Mount |
| Lead Free / RoHS | Yes (RoHS compliant, -N suffix) | — |
| Moisture Sensitivity Level | MSL 3 | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements | — | 1270 |
| Maximum Internal Frequency | — | 118.3 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 6.2 ns |
| Internal Frequency (typical) | — | 201 MHz |
| Configuration Memory | — | Flash (non-volatile, in-system programmable) |
| VCCINT (Core Supply) | — | 1.71 V to 1.89 V |
| VCCIO (I/O Supply, per bank) | — | 1.2 V to 3.3 V |
| Number of I/O Banks | — | 4 |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI up to 3.3 V, 1.2 V to 3.3 V LVCMOS on JTAG pins |
| JTAG Interface | — | IEEE 1149.1 (TMS, TDI, TDO, TCK in Bank 1) |
| Programming Interface | — | JTAG in-system programmable (Altera Quartus II) |
| Program/Erase Cycles | — | Up to 100,000 |
| RoHS-Status | — | Compliant |