ADC1412D080HN-C18 vs ADC1412D125HN-C18 Vergleich

Detaillierter Direktvergleich von ADC1412D080HN-C18 von Renesas Electronics und ADC1412D125HN-C18 von Renesas Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Renesas Electronics
ADC1412D080HN-C18 ADC1412D080HN-C18 - Dual 14-bit 80MSPS ADC, LVDS DDR | Renesas

ADC1412D080HN-C18 - Dual 14-bit 80MSPS ADC, LVDS DDR | Renesas

ADC1412D080HN-C18 Obsolete
Renesas Electronics
ADC1412D125HN-C18 ADC1412D125HN-C18 - 14-Bit Dual 125 MSPS ADC | Renesas

ADC1412D125HN-C18 - 14-Bit Dual 125 MSPS ADC | Renesas

ADC1412D125HN-C18 ✓ Aktiv

Spezifikationsvergleich

Parameter ADC1412D080HN-C18 ADC1412D125HN-C18
Marke Renesas Electronics Renesas Electronics
Kategorie ADC/DAC ADC/DAC
Lebenszyklusstatus Obsolete Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $18,25 $20,85
Auflösung 14 bit 14 bit
Number of Channels 2 2 (simultaneous sampling)
Sample Rate (per channel) 80 Msps —
Architecture Pipelined Pipelined
Output Interface CMOS or LVDS DDR (selectable) —
Input Channels 2 (differential or single-ended) —
Gehäuse 64-VFQFPN (HVQFN) 9x9 mm with exposed pad 64-pin VFQFPN, 9 mm x 9 mm with exposed pad
Montageart Surface Mount Surface Mount
Pin-Anzahl 64 —
Family Sample Rate Options 65 / 80 / 105 / 125 Msps —
Family Series ADC1412D SER —
Betriebstemperatur [DATA_NEEDED: operating temperature range] —
Versorgungsspannung [DATA_NEEDED: supply voltage] —
Power Consumption [DATA_NEEDED: power consumption per channel] —
SNR [DATA_NEEDED: signal-to-noise ratio] —
SFDR [DATA_NEEDED: spurious-free dynamic range] —
RoHS-Status [DATA_NEEDED: RoHS compliance status] Compliant
MSL-Level [DATA_NEEDED: moisture sensitivity level] 3
Sample Rate (max) — 125 MSPS
Input Type — Differential
Input Full-Scale Range — 1.5 Vp-p (typical)
Analog Input Bandwidth — 1.1 GHz (typical)
Supply Voltage (AVDD / DRVDD) — 1.8 V
Digital Output Interface — LVDS or CMOS DDR
SNR (typical) — 71 dBFS
SFDR (typical) — 85 dBc
Power Dissipation (per channel, typ.) — [DATA_NEEDED: power dissipation per channel at 125 MSPS]
Betriebstemperaturbereich — -40 C to +85 C (industrial)
Clock Input — Differential LVDS / LVPECL compatible

Datenblätter & Ressourcen

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