ADC1412D080HN-C18 vs ADC1412D125HN-C18 Comparaison

Comparaison détaillée côte à côte de ADC1412D080HN-C18 par Renesas Electronics et ADC1412D125HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Renesas Electronics
ADC1412D080HN-C18 ADC1412D080HN-C18 - Dual 14-bit 80MSPS ADC, LVDS DDR | Renesas

ADC1412D080HN-C18 - Dual 14-bit 80MSPS ADC, LVDS DDR | Renesas

ADC1412D080HN-C18 Obsolete
Renesas Electronics
ADC1412D125HN-C18 ADC1412D125HN-C18 - 14-Bit Dual 125 MSPS ADC | Renesas

ADC1412D125HN-C18 - 14-Bit Dual 125 MSPS ADC | Renesas

ADC1412D125HN-C18 ✓ Actif

Comparaison des spécifications

Paramètre ADC1412D080HN-C18 ADC1412D125HN-C18
Marque Renesas Electronics Renesas Electronics
Catégorie ADC/DAC ADC/DAC
Statut du cycle de vie Obsolete Actif
Statut du stock In Stock In Stock
Prix unitaire (USD) $18,25 $20,85
Résolution 14 bit 14 bit
Number of Channels 2 2 (simultaneous sampling)
Sample Rate (per channel) 80 Msps —
Architecture Pipelined Pipelined
Output Interface CMOS or LVDS DDR (selectable) —
Input Channels 2 (differential or single-ended) —
Boîtier 64-VFQFPN (HVQFN) 9x9 mm with exposed pad 64-pin VFQFPN, 9 mm x 9 mm with exposed pad
Type de montage Surface Mount Surface Mount
Nombre de broches 64 —
Family Sample Rate Options 65 / 80 / 105 / 125 Msps —
Family Series ADC1412D SER —
Température de fonctionnement [DATA_NEEDED: operating temperature range] —
Tension d'alimentation [DATA_NEEDED: supply voltage] —
Power Consumption [DATA_NEEDED: power consumption per channel] —
SNR [DATA_NEEDED: signal-to-noise ratio] —
SFDR [DATA_NEEDED: spurious-free dynamic range] —
Statut RoHS [DATA_NEEDED: RoHS compliance status] Compliant
Niveau MSL [DATA_NEEDED: moisture sensitivity level] 3
Sample Rate (max) — 125 MSPS
Input Type — Differential
Input Full-Scale Range — 1.5 Vp-p (typical)
Analog Input Bandwidth — 1.1 GHz (typical)
Supply Voltage (AVDD / DRVDD) — 1.8 V
Digital Output Interface — LVDS or CMOS DDR
SNR (typical) — 71 dBFS
SFDR (typical) — 85 dBc
Power Dissipation (per channel, typ.) — [DATA_NEEDED: power dissipation per channel at 125 MSPS]
Plage de température de fonctionnement — -40 C to +85 C (industrial)
Clock Input — Differential LVDS / LVPECL compatible

Fiches techniques et ressources

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