AFS600-1FGG484 vs M7AFS600-1FG484I Vergleich
Detaillierter Direktvergleich von AFS600-1FGG484 von Microchip Technology und M7AFS600-1FG484I von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Microchip Technology
AFS600-1FGG484 - 600K Gate Mixed-Signal FPGA | Microchip
AFS600-1FGG484 ✓ AktivMicrochip Technology
M7AFS600-1FG484I - Fusion FPGA 600K Gates, 484 FBGA | Microchip
M7AFS600-1FG484I ✓ AktivSpezifikationsvergleich
| Parameter | AFS600-1FGG484 | M7AFS600-1FG484I |
|---|---|---|
| Marke | Microchip Technology | Microchip Technology |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | — |
| System Gates | 600,000 gates | 600000 |
| Number of I/O | 172 I/O | — |
| Gehäuse | 484-BGA | 484-ball FBGA (FG484), 23 x 23 x 2.44 mm |
| Montageart | SMD/SMT | Surface Mount |
| Versorgungsspannung | 1.5 V | — |
| Process Technology | 130 nm flash-based CMOS | 130 nm, 7-layer metal, Flash-based CMOS |
| Logic Family | CMOS | CMOS |
| Programmable Logic Type | Flash-based FPGA | — |
| Maximale Taktfrequenz | 1282.05 MHz | — |
| Betriebstemperatur | 0 C to 85 C | Industrial, -40C to +85C |
| Tested Junction Temperature | 100 C | — |
| Metal Layers | 7 layers | — |
| Product Series | AFS600 Fusion Family | — |
| Minimum Order Quantity | 60 units | — |
| Packaging | Tray | — |
| Lead Time | 12 weeks | — |
| Lebenszyklusstatus | Active | — |
| RoHS-Status | ROHS3 compliant | Compliant |
| Programmable Analog | Integrated configurable analog blocks | — |
| Configuration Memory | Large flash-memory blocks | Nonvolatile Flash, retains program when powered off |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Product Weight | [DATA_NEEDED: product weight] | — |
| REACH Compliance | [DATA_NEEDED: REACH compliance] | — |
| Programmable Logic Tiles | — | 110592 |
| User I/O | — | 172 |
| Family | — | Fusion (Flash FPGA with optional ARM CoreMP7 support) |
| Power-Up Feature | — | Live at Power-Up (LAPU) |
| Supply Voltage (Core) | — | 1.5 V |
| Speed Grade | — | 1 |
| Ball Pitch | — | 1.0 mm |
| Embedded Processor Support | — | ARM CoreMP7 |