AFS600-1FGG484 vs M7AFS600-1FG484I Comparaison
Comparaison détaillée côte à côte de AFS600-1FGG484 par Microchip Technology et M7AFS600-1FG484I par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
AFS600-1FGG484 - 600K Gate Mixed-Signal FPGA | Microchip
AFS600-1FGG484 ✓ ActifMicrochip Technology
M7AFS600-1FG484I - Fusion FPGA 600K Gates, 484 FBGA | Microchip
M7AFS600-1FG484I ✓ ActifComparaison des spécifications
| Paramètre | AFS600-1FGG484 | M7AFS600-1FG484I |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | — |
| System Gates | 600,000 gates | 600000 |
| Number of I/O | 172 I/O | — |
| Boîtier | 484-BGA | 484-ball FBGA (FG484), 23 x 23 x 2.44 mm |
| Type de montage | SMD/SMT | Surface Mount |
| Tension d'alimentation | 1.5 V | — |
| Process Technology | 130 nm flash-based CMOS | 130 nm, 7-layer metal, Flash-based CMOS |
| Logic Family | CMOS | CMOS |
| Programmable Logic Type | Flash-based FPGA | — |
| Fréquence d'horloge maximale | 1282.05 MHz | — |
| Température de fonctionnement | 0 C to 85 C | Industrial, -40C to +85C |
| Tested Junction Temperature | 100 C | — |
| Metal Layers | 7 layers | — |
| Product Series | AFS600 Fusion Family | — |
| Minimum Order Quantity | 60 units | — |
| Packaging | Tray | — |
| Lead Time | 12 weeks | — |
| Statut du cycle de vie | Active | — |
| Statut RoHS | ROHS3 compliant | Compliant |
| Programmable Analog | Integrated configurable analog blocks | — |
| Configuration Memory | Large flash-memory blocks | Nonvolatile Flash, retains program when powered off |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Product Weight | [DATA_NEEDED: product weight] | — |
| REACH Compliance | [DATA_NEEDED: REACH compliance] | — |
| Programmable Logic Tiles | — | 110592 |
| User I/O | — | 172 |
| Family | — | Fusion (Flash FPGA with optional ARM CoreMP7 support) |
| Power-Up Feature | — | Live at Power-Up (LAPU) |
| Supply Voltage (Core) | — | 1.5 V |
| Speed Grade | — | 1 |
| Ball Pitch | — | 1.0 mm |
| Embedded Processor Support | — | ARM CoreMP7 |