CP2104-F03-GMR vs CP2104-F03-GM Vergleich
Detaillierter Direktvergleich von CP2104-F03-GMR von Silicon Labs und CP2104-F03-GM von Silicon Labs. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | CP2104-F03-GMR | CP2104-F03-GM |
|---|---|---|
| Marke | Silicon Labs | Silicon Labs |
| Kategorie | Interface ICs | Interface ICs |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1,06 | $1,62 |
| Funktion | USB 2.0 to UART bridge controller | USB to UART Bridge Controller |
| USB Standard | USB 2.0 full speed, 12 Mbps | USB 2.0 Full-Speed |
| UART Channels | 1 | 1 |
| Baud Rate Range | 300 bps to 2 Mbps (programmable) | — |
| FIFO Buffer | 576 byte | — |
| Versorgungsspannung | 3 V to 3.6 V (VDD) | — |
| I/O Supply (VIO) | 1.8 V, 3 V to 3.6 V | [DATA_NEEDED: VIO voltage range] |
| On-Chip Regulator Output | 3.45 V | — |
| Non-Volatile Memory | 1024 byte one-time-programmable ROM | — |
| GPIO | 4 digital I/O pins | 4 (GPIO.0 to GPIO.3) |
| Flow Control | ~RTS, ~CTS, ~DTR, ~DSR, ~DCD, ~RI | — |
| Gehäuse | 24-QFN (4x4 mm) with exposed pad | 24-QFN (4x4 mm) with exposed pad |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C | [DATA_NEEDED: operating temperature range] |
| Integrated Clock | Yes (no external crystal required) | — |
| Integrated USB Transceiver | Yes (no external resistors required) | — |
| Power-On Reset | On-chip | On-chip |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Receive FIFO | — | 576 byte |
| Supply Voltage (VDD) | — | 3.3 V |
| Integrated Crystal | — | Yes (no external crystal required) |
| OTP ROM | — | 1024 byte (custom product information) |
| UART Handshake Signals | — | ~RTS, ~CTS, ~DTR, ~DSR, ~DCD, ~RI |
| Driver Support | — | VCP and USBXpress (Windows, macOS, Linux) |
| MSL-Level | — | [DATA_NEEDED: moisture sensitivity level] |