EP1810JC-45 vs EP1810LC-45 Vergleich
Detaillierter Direktvergleich von EP1810JC-45 von Altera und EP1810LC-45 von Rochester Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP1810LC-45 - 900-Gate Classic EPLD, 48 Macro Cells, PLCC-68 | Intel
EP1810LC-45 ObsoleteSpezifikationsvergleich
| Parameter | EP1810JC-45 | EP1810LC-45 |
|---|---|---|
| Marke | Altera | Rochester Electronics |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,10 | $49,90 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | EP1810 (Classic EPLD Family) | Altera Classic EPLD |
| Macrocells | 48 | — |
| Equivalent Gates | 2100 gates | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 48 | — |
| Total User I/O | 60 | — |
| Propagation Delay (tpd) | 45 ns | 45 ns |
| Maximale Taktfrequenz | 33.3 MHz | — |
| Technology | CMOS, UV-erasable | — |
| Maximum Supply Voltage | 5.25 V | — |
| Gehäuse | PLCC-68 (QCCJ, J-Lead, windowed ceramic) | 68-pin PLCC (J-lead) |
| Pin-Anzahl | 68 | — |
| Package Code | QCCJ | — |
| Temperature Grade | Commercial | — |
| Montageart | Surface Mount | Surface Mount (PLCC socket compatible) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance not stated in verified data] | [DATA_NEEDED: RoHS status of Rochester-sourced part] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 900 |
| Macro Cells | — | 48 |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| Logic Array Blocks | — | 4 |
| Maximum Operating Frequency | — | 22.2 MHz |
| Supply Voltage (Vcc) | — | 5 V (±5%) |
| Process Technology | — | 5 V CMOS EPROM |
| Betriebstemperatur | — | 0 °C to +70 °C (commercial) |
| Lead-Free | — | [DATA_NEEDED: lead-free finish] |