EP1AGX60CF484I8N vs EP1AGX60CF484I6N Vergleich
Detaillierter Direktvergleich von EP1AGX60CF484I8N von Altera und EP1AGX60CF484I6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1AGX60CF484I6N - Arria GX FPGA, 60K LE, 484-FBGA | Intel | Altera
EP1AGX60CF484I6N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1AGX60CF484I8N | EP1AGX60CF484I6N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.410,00 | $485,25 |
| Family | Arria GX | — |
| Logic Elements | 60,100 | — |
| Embedded Memory (bits) | 2,528,640 | — |
| User I/O | 229 | — |
| Gehäuse | 484-ball FineLine BGA (FBGA-484) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Speed Grade | -8 (fastest in Arria GX) | 6 |
| Temperature Grade | Industrial (-40C to +100C case) | — |
| RoHS-Status | Compliant (lead-free) | Compliant |
| Embedded Transceivers | [DATA_NEEDED: number of transceiver channels and max data rate] | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: count] | — |
| Process Technology | 90 nm | SRAM-based CMOS |
| Supply Voltage (Core) | [DATA_NEEDED: Vccint] | — |
| Design Toolchain | Altera Quartus II | — |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Lead-Free | Yes (N suffix) | Yes |
| Series | — | Arria GX |
| Family Name | — | Arria GX FPGA |
| Logic Elements (LE) | — | 60,000 |
| Logic Array Blocks (LABs) | — | 3,005 |
| Number of I/O | — | 229 |
| Number of Logic Array Blocks | — | 60,100 |
| Embedded Memory | — | 2,528,640 bits |
| Transceiver Data Rate | — | 3.125 Gbps |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Package Type | — | 484-BBGA (FCBGA) |
| Package Pin Count | — | 484 |
| Operating Temperature Grade | — | Industrial |
| Betriebstemperaturbereich | — | -40C to +100C |
| Configuration Method | — | JTAG / Active Serial / Passive Parallel |