EP1C12Q240 vs EP1C12Q240C7N Vergleich
Detaillierter Direktvergleich von EP1C12Q240 von Altera und EP1C12Q240C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1C12Q240 | EP1C12Q240C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $25,60 | $22,80 |
| Product Type | FPGA - Field Programmable Gate Array | — |
| Series | Cyclone | Cyclone I |
| Logic Elements | 12,060 LE | 12,060 |
| Logic Array Blocks | 1,206 LABs | — |
| Total RAM Bits | 239,616 bits | 239,616 bits |
| Number of User I/O | 173 | — |
| Gehäuse | 240-BFQFP | 240-pin PQFP / BFQFP |
| Anzahl der Pins | 240 | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 0.13-um all-layer copper SRAM process | 130 nm CMOS |
| Configuration Technology | SRAM-based, reconfigurable | — |
| JTAG Boundary-Scan | Supported | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | [DATA_NEEDED: Depends on ordering suffix - C for commercial temperature, I for industrial temperature] | — |
| Speed Grade | [DATA_NEEDED: Speed grade suffix not specified in base part number] | C7 (commercial, -7) |
| Lead-Free / RoHS Status | [DATA_NEEDED: Base ordering code does not include N suffix; N-suffix variants are lead-free] | — |
| Lebenszyklusstatus | Obsolete - Cyclone I family | — |
| Family | — | Cyclone |
| Manufacturer | — | Intel (formerly Altera) |
| Configurable Logic Blocks (CLBs) | — | 12,060 |
| Embedded Memory Blocks | — | 52 M4K blocks (4 Kbit each) |
| Maximum User I/O | — | 173 |
| Core Voltage | — | 1.5 V |
| Internal Performance | — | 320.1 MHz |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Package Body Size | — | 34.60 x 34.60 mm |
| Lead Pitch | — | 0.50 mm |
| Terminal Form | — | Gull wing |
| PLLs | — | 2 (dual-clock) |
| Configuration Method | — | SRAM, serial/parallel via external flash |