EP1C12Q240I7 vs EP1C12Q240I8ES Vergleich
Detaillierter Direktvergleich von EP1C12Q240I7 von Altera und EP1C12Q240I8ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1C12Q240I7 | EP1C12Q240I8ES |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $30,10 | $7,15 |
| Family | Cyclone | — |
| Logic Elements (LE) | 12,060 | — |
| Logic Array Blocks (LABs) | 1,206 | — |
| Total RAM Bits | 239,616 | — |
| User I/O Pins | 173 | — |
| PLLs | 2 | — |
| Process Technology | 130 nm CMOS, 1.5 V core | — |
| Gehäuse | 240-pin PQFP / BFQFP (240QFP) | — |
| Montageart | Surface Mount | — |
| Betriebstemperatur | -40°C to +100°C (industrial) | — |
| Speed Grade | I7 | 8 |
| Configuration Method | Serial or parallel, SRAM-based | — |
| Design Software | Altera Quartus II | — |
| MSL-Level | [DATA_NEEDED: MSL Level] | — |
| RoHS-Status | [DATA_NEEDED: RoHS Status] | unknown |
| Manufacturer | — | Intel |
| Manufacturer Part Number | — | EP1C12Q240I8ES |
| FPGA Family | — | Cyclone |
| Programmable Logic Type | — | FPGA (field-programmable gate array) |
| Configuration Type | — | SRAM-based |
| FPGA Process | — | 1.5-V, 0.13-um, all-layer copper SRAM process |
| Maximum Family Logic Elements | — | 20,060 LEs |
| Maximum Family Embedded RAM | — | 288 Kbits |
| EP1C12 Delivered Logic Elements | — | [DATA_NEEDED: EP1C12 exact LE count] |
| Package Code | — | FQFP |
| Package Description | — | 240-pin square QFP (PQFP/FQFP) |
| Number of Terminals | — | 240 |
| Terminal Form | — | GULL WING |
| Package Shape | — | Square |
| JESD-609 Code | — | e0 |
| Maximum Supply Voltage | — | 1.575 V |
| Nominal Core Supply Voltage | — | 1.5 V |
| Temperature Grade Code | — | I (industrial) |
| Ordering Code Variant | — | ES (engineering sample) |
| Minimum Operating Temperature | — | [DATA_NEEDED: minimum operating temperature] |
| Maximum Operating Temperature | — | [DATA_NEEDED: maximum operating temperature] |
| Supported Configuration | — | Configuration and JTAG boundary-scan testing supported |