EP1K100QC208-1 vs EP1K100QC208-3N Vergleich

Detaillierter Direktvergleich von EP1K100QC208-1 von Altera und EP1K100QC208-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

Spezifikationsvergleich

Parameter EP1K100QC208-1 EP1K100QC208-3N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $20,85 $19,50
Family ACEX-1K —
Series ACEX 1K —
Logic Elements (LEs) 4992 —
Logic Array Blocks (LABs) 624 —
Maximum User I/O Pins 147 —
Embedded Memory Bits 49152 —
Number of RAM Blocks Dual-port EAB array —
Process Technology 0.22 µm —
Core Supply Voltage 2.5 V 2.5 V
Internal Performance 333.33 MHz —
Number of Logic Gates 100000 —
Package Type 208-BFQFP (PQFP-208) 208-BFQFP
Montageart Surface Mount Surface Mount
Operating Temperature Grade Commercial (C) —
Speed Grade -1 —
Configuration Method Passive Serial / Passive Parallel Synchronous, JTAG —
RoHS-Status unknown [DATA_NEEDED: RoHS certificate status]
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Maximum Internal Clock Frequency — 200 MHz
Anzahl der Pins — 208
Terminal Form — Gull Wing
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
Betriebstemperaturbereich — Commercial grade ([DATA_NEEDED: exact operating temperature range])
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

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