EP1K100QC208-1 vs EP1K100QC208-3N 对比

详细并排对比 EP1K100QC208-1 出自 Altera 和 EP1K100QC208-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

规格对比

参数 EP1K100QC208-1 EP1K100QC208-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $20.85 $19.50
Family ACEX-1K —
Series ACEX 1K —
Logic Elements (LEs) 4992 —
Logic Array Blocks (LABs) 624 —
Maximum User I/O Pins 147 —
Embedded Memory Bits 49152 —
Number of RAM Blocks Dual-port EAB array —
Process Technology 0.22 µm —
Core Supply Voltage 2.5 V 2.5 V
Internal Performance 333.33 MHz —
Number of Logic Gates 100000 —
Package Type 208-BFQFP (PQFP-208) 208-BFQFP
安装类型 Surface Mount Surface Mount
Operating Temperature Grade Commercial (C) —
Speed Grade -1 —
Configuration Method Passive Serial / Passive Parallel Synchronous, JTAG —
RoHS 状态 unknown [DATA_NEEDED: RoHS certificate status]
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Maximum Internal Clock Frequency — 200 MHz
引脚数 — 208
Terminal Form — Gull Wing
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
工作温度范围 — Commercial grade ([DATA_NEEDED: exact operating temperature range])
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

数据手册与资源

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