EP1K10TC100-2 vs EP1K10TC100-2N Vergleich

Detaillierter Direktvergleich von EP1K10TC100-2 von Intel und EP1K10TC100-2N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP1K10TC100-2N EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP1K10TC100-2 EP1K10TC100-2N
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,85 $8,25
Family ACEX-1K ACEX-1K
Device Type FPGA (Field Programmable Gate Array) —
Logic Elements / Cells 576 576
Number of Logic Array Blocks (LABs/CLBs) 72 —
Total RAM Bits 12288 —
Number of Gates 10000 (typical); 56000 (maximum) —
Number of User I/O 66 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Pin-to-Pin Logic Delay 0.5 ns —
Maximum Internal Frequency 200 MHz (per FPGAkey listing) —
Process Technology 0.22 μm CMOS 0.22 um CMOS
Core Supply Voltage (VCCINT) 2.375 V to 2.625 V (2.5 V nominal) —
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO range] —
Betriebstemperatur 0 °C to 70 °C (TA, commercial) 0 C to +70 C (commercial)
Gehäuse 100-pin TQFP (TQFP-100) 100-pin TQFP (1.0 mm body, 0.5 mm pitch)
Montageart Surface Mount Surface Mount
Configuration Method SRAM, serial / JTAG (IEEE 1149.1) —
RoHS-Status Compliant (per Heisener / DigiKey listings) Lead-free / RoHS compliant
Lead-Free Yes —
Typical Gates — 10,000
Logic Array Blocks (LABs) — 72
Embedded Memory (EAB) — 12,288 bits
Maximum User I/O — 66
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5 V
Speed Grade — -2
Maximum Frequency — 200 MHz
Configuration Modes — Passive Serial, Active Serial, JTAG

Datenblätter & Ressourcen

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