EP1K10TC100-2 vs EP1K10TC100-2N 对比

详细并排对比 EP1K10TC100-2 出自 Intel 和 EP1K10TC100-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1K10TC100-2N EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N ⚠ 最后一次采购

规格对比

参数 EP1K10TC100-2 EP1K10TC100-2N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $9.85 $8.25
Family ACEX-1K ACEX-1K
Device Type FPGA (Field Programmable Gate Array) —
Logic Elements / Cells 576 576
Number of Logic Array Blocks (LABs/CLBs) 72 —
Total RAM Bits 12288 —
Number of Gates 10000 (typical); 56000 (maximum) —
Number of User I/O 66 —
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Pin-to-Pin Logic Delay 0.5 ns —
Maximum Internal Frequency 200 MHz (per FPGAkey listing) —
Process Technology 0.22 μm CMOS 0.22 um CMOS
Core Supply Voltage (VCCINT) 2.375 V to 2.625 V (2.5 V nominal) —
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO range] —
工作温度 0 °C to 70 °C (TA, commercial) 0 C to +70 C (commercial)
封装 100-pin TQFP (TQFP-100) 100-pin TQFP (1.0 mm body, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount
Configuration Method SRAM, serial / JTAG (IEEE 1149.1) —
RoHS 状态 Compliant (per Heisener / DigiKey listings) Lead-free / RoHS compliant
Lead-Free Yes —
Typical Gates — 10,000
Logic Array Blocks (LABs) — 72
Embedded Memory (EAB) — 12,288 bits
Maximum User I/O — 66
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5 V
Speed Grade — -2
Maximum Frequency — 200 MHz
Configuration Modes — Passive Serial, Active Serial, JTAG

数据手册与资源

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