EP1M350F780C5N vs EP1M350F780I5 Vergleich
Detaillierter Direktvergleich von EP1M350F780C5N von Altera und EP1M350F780I5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1M350F780C5N - 350K Gates Mercury FPGA w/ 1.25 Gbps CDR | Intel/Altera
EP1M350F780C5N ObsoleteAltera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndSpezifikationsvergleich
| Parameter | EP1M350F780C5N | EP1M350F780I5 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $115,00 | $178,00 |
| Device Family | Mercury (EP1M350) | Altera Mercury (EP1M) Enhanced Configuration Device |
| Equivalent Gates | 350,000 | — |
| Logic Cells (LEs) | 14,400 | — |
| User I/Os | 486 | — |
| Total Pins / Terminals | 780 | — |
| Logic Family | CMOS | — |
| Core Supply Voltage | 1.8 V | — |
| Package Type | FineLine BGA (FC-FBGA / PBGA-B780) | — |
| Terminal Form | Ball | — |
| Terminal Pitch | 1.000 mm | — |
| Montageart | Surface Mount | — |
| Betriebstemperatur | 0 C to 85 C | — |
| Transceivers | Integrated high-speed CDR to 1.25 Gbps | — |
| Architecture | LUT-based, optimized for high performance | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| Funktion | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| Gehäuse | — | 780-ball FineLine BGA (F780) |
| Temperature Grade (suffix "I") | — | Industrial |
| Speed Grade | — | 5 |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |