EP1M350F780C5N vs EP1M350F780I5 비교
다음의 상세 나란히 비교: EP1M350F780C5N 제조: Altera 및 EP1M350F780I5 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EP1M350F780C5N - 350K Gates Mercury FPGA w/ 1.25 Gbps CDR | Intel/Altera
EP1M350F780C5N ObsoleteAltera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 Nrnd사양 비교
| 파라미터 | EP1M350F780C5N | EP1M350F780I5 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $115.00 | $178.00 |
| Device Family | Mercury (EP1M350) | Altera Mercury (EP1M) Enhanced Configuration Device |
| Equivalent Gates | 350,000 | — |
| Logic Cells (LEs) | 14,400 | — |
| User I/Os | 486 | — |
| Total Pins / Terminals | 780 | — |
| Logic Family | CMOS | — |
| Core Supply Voltage | 1.8 V | — |
| Package Type | FineLine BGA (FC-FBGA / PBGA-B780) | — |
| Terminal Form | Ball | — |
| Terminal Pitch | 1.000 mm | — |
| 실장 유형 | Surface Mount | — |
| 동작 온도 | 0 C to 85 C | — |
| Transceivers | Integrated high-speed CDR to 1.25 Gbps | — |
| Architecture | LUT-based, optimized for high performance | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| 기능 | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| 패키지 | — | 780-ball FineLine BGA (F780) |
| Temperature Grade (suffix "I") | — | Industrial |
| Speed Grade | — | 5 |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |