EP1M350F780C7 vs EP1M350F780I5 Vergleich
Detaillierter Direktvergleich von EP1M350F780C7 von Intel und EP1M350F780I5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndSpezifikationsvergleich
| Parameter | EP1M350F780C7 | EP1M350F780I5 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $162,00 | $178,00 |
| Family | Mercury (PLD) | — |
| Device Logic Elements | [DATA_NEEDED: exact LE count] | — |
| Logic Array Blocks (LABs) | 1440 | — |
| System Gates | 350,000 | — |
| Maximum User I/Os | 486 | — |
| Gehäuse | 780-ball FineLine BGA (F780) | 780-ball FineLine BGA (F780) |
| Package Type | FINE LINE BGA-780 | — |
| Supply Voltage (Core) | 1.8 V | — |
| Logic Family | CMOS | — |
| Betriebstemperatur | 0 C to 85 C (Commercial) | — |
| Montageart | Surface Mount | — |
| Transceivers / CDR Support | Up to 1.25 Gbps with CDR | — |
| Configuration Method | JTAG / Quartus II | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Process Technology | CMOS SRAM-based | — |
| Device Family | — | Altera Mercury (EP1M) Enhanced Configuration Device |
| Funktion | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| Temperature Grade (suffix "I") | — | Industrial |
| Speed Grade | — | 5 |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |