EP1S10F672C7N vs EP1S10F672C6 Vergleich
Detaillierter Direktvergleich von EP1S10F672C7N von Altera und EP1S10F672C6 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S10F672C6 - 10K LE Stratix FPGA 672-BGA | Intel (Altera)
EP1S10F672C6 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1S10F672C7N | EP1S10F672C6 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $72,00 |
| Series | Stratix | Stratix® I |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | 6 |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| Maximum Operating Frequency | 420.17 MHz | — |
| Betriebstemperatur | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | Stratix FPGA |
| Logic Elements (LE) | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1057 |
| Total Memory Bits | — | 920,448 bits |
| Embedded Memory | — | TriMatrix (MRAM/M4K) |
| Number of I/Os | — | 345 |
| Number of PLLs | — | 12 (6 per device side) |
| Gehäuse | — | 672-ball FineLine BGA (FBGA) |
| Maximum Core Frequency | — | 420.17 MHz |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |