EP1S10F672C7N vs EP1S10F672C6 Comparaison
Comparaison détaillée côte à côte de EP1S10F672C7N par Altera et EP1S10F672C6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F672C7N | EP1S10F672C6 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $72,00 |
| Series | Stratix | Stratix® I |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | 6 |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| Maximum Operating Frequency | 420.17 MHz | — |
| Température de fonctionnement | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Niveau MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | Stratix FPGA |
| Logic Elements (LE) | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1057 |
| Total Memory Bits | — | 920,448 bits |
| Embedded Memory | — | TriMatrix (MRAM/M4K) |
| Number of I/Os | — | 345 |
| Number of PLLs | — | 12 (6 per device side) |
| Boîtier | — | 672-ball FineLine BGA (FBGA) |
| Maximum Core Frequency | — | 420.17 MHz |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |