EP1S20B672C7N vs EP1S25F672C7N Vergleich
Detaillierter Direktvergleich von EP1S20B672C7N von Intel und EP1S25F672C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S20B672C7N | EP1S25F672C7N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $320,00 | $535,00 |
| Series | Stratix | — |
| Family | Stratix (original) | — |
| Process Technology | 0.13 µm CMOS | 0.13 µm CMOS |
| Logic Elements (LEs) | 18,460 | 25,660 |
| LABs / CLBs | 1,846 | — |
| Embedded Memory Bits | 1,669,248 bits | 1,944,576 |
| Maximum User I/O | 426 | 473 |
| Number of Pins / Balls | 672 | — |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core, VCCINT) | 1.5 V | — |
| Betriebstemperatur | 0 °C to 85 °C (Commercial Extended) | 0 °C to 85 °C (commercial) |
| Speed Grade | -7 | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| MSL-Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Logic Family | CMOS | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm from product page] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | Stratix |
| Logic Array Blocks (LABs) | — | 2,566 |
| Number of I/O Pins | — | 672 (BGA balls) |
| Gehäuse | — | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |