EP1S25F1020C6N vs EP1S25B672C7N Vergleich
Detaillierter Direktvergleich von EP1S25F1020C6N von Altera und EP1S25B672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F1020C6N | EP1S25B672C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $450,00 | $620,15 |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | — |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | — |
| LABs (Logic Array Blocks) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Gehäuse | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | — |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Betriebstemperatur | 0C to +85C (Commercial) | 0 °C to 85 °C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (per Intel/Altera product page) |
| Configuration Method | JTAG or EPC configuration device | SRAM-based, JTAG (IEEE 1149.1) |
| Family Generation | Stratix (1st generation) | — |
| Logic Elements / Cells | — | 25660 |
| Number of User I/O | — | 473 |
| Anzahl der Pins | — | 672 |
| Package Type | — | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core) | — | 1.5 V |
| Logic Family | — | CMOS |
| Maximum Operating Frequency | — | 420.17 MHz |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Embedded Memory | — | TriMatrix RAM blocks |
| DSP Blocks | — | Yes (dedicated multiplier/accumulator) |
| PLLs | — | Yes (on-die) |