EP1S25F1020C6N vs EP1S25F1020C5N Vergleich
Detaillierter Direktvergleich von EP1S25F1020C6N von Altera und EP1S25F1020C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F1020C6N | EP1S25F1020C5N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $450,00 | $640,00 |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | 25660 |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | 706 |
| LABs (Logic Array Blocks) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Gehäuse | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Betriebstemperatur | 0C to +85C (Commercial) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirmed RoHS status] |
| Configuration Method | JTAG or EPC configuration device | — |
| Family Generation | Stratix (1st generation) | — |
| Configurable Logic Blocks (CLBs) | — | 2852 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | 500 MHz |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Temperature Grade | — | Commercial (0 C to 85 C) |
| Speed Grade | — | -5 |
| Lead-Free | — | Yes (N suffix) |
| Configuration Interface | — | JTAG / EPCS boot PROM |
| Logic Family | — | CMOS |