EP1S25F1020C6N vs EP1S25F1020I6N Vergleich
Detaillierter Direktvergleich von EP1S25F1020C6N von Altera und EP1S25F1020I6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F1020C6N | EP1S25F1020I6N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $450,00 | $1.028,03 |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | 25,660 |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | — |
| LABs (Logic Array Blocks) | 2,566 | — |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Gehäuse | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA (33 × 33 mm, 1 mm pitch) |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Betriebstemperatur | 0C to +85C (Commercial) | 0 °C to +85 °C (industrial, I6) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Configuration Method | JTAG or EPC configuration device | — |
| Family Generation | Stratix (1st generation) | — |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory | — | 1,944,576 bits |
| User I/Os | — | 706 |
| Maximum User I/O Pins | — | 706 |
| Core Voltage | — | 1.5 V |
| Technology Node | — | 130 nm CMOS |
| Pin-Anzahl | — | 1020 |
| Device Family | — | Stratix FPGA |
| Logic Family | — | CMOS |
| Lead-Free / RoHS | — | RoHS compliant per Altera / Intel product page |