EP1S25F672C7N vs EP1S25B672C7N Vergleich
Detaillierter Direktvergleich von EP1S25F672C7N von Altera und EP1S25B672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F672C7N | EP1S25B672C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $535,00 | $620,15 |
| Device Family | Stratix | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory Bits | 1,944,576 | — |
| Maximum User I/O | 473 | — |
| Number of I/O Pins | 672 (BGA balls) | — |
| Gehäuse | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch | — |
| Process Technology | 0.13 µm CMOS | 130 nm |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] | — |
| Betriebstemperatur | 0 °C to 85 °C (commercial) | 0 °C to 85 °C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Method | JTAG / Passive Serial / Active Serial | SRAM-based, JTAG (IEEE 1149.1) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| RoHS-Status | [DATA_NEEDED: confirm from product page] | Compliant (per Intel/Altera product page) |
| Family | — | Stratix |
| Logic Elements / Cells | — | 25660 |
| Number of User I/O | — | 473 |
| Anzahl der Pins | — | 672 |
| Package Type | — | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core) | — | 1.5 V |
| Logic Family | — | CMOS |
| Maximum Operating Frequency | — | 420.17 MHz |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Embedded Memory | — | TriMatrix RAM blocks |
| DSP Blocks | — | Yes (dedicated multiplier/accumulator) |
| PLLs | — | Yes (on-die) |