EP1S25F672C7N vs EP1S25B672C7N Comparaison
Comparaison détaillée côte à côte de EP1S25F672C7N par Altera et EP1S25B672C7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F672C7N | EP1S25B672C7N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $535,00 | $620,15 |
| Device Family | Stratix | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory Bits | 1,944,576 | — |
| Maximum User I/O | 473 | — |
| Number of I/O Pins | 672 (BGA balls) | — |
| Boîtier | 672-BBGA (FineLine BGA), 35 × 35 mm, 1.27 mm pitch | — |
| Process Technology | 0.13 µm CMOS | 130 nm |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: bank-dependent 1.2 V–3.3 V] | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 °C to 85 °C (Commercial) |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Method | JTAG / Passive Serial / Active Serial | SRAM-based, JTAG (IEEE 1149.1) |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: confirm from product page] | Compliant (per Intel/Altera product page) |
| Family | — | Stratix |
| Logic Elements / Cells | — | 25660 |
| Number of User I/O | — | 473 |
| Nombre de broches | — | 672 |
| Package Type | — | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core) | — | 1.5 V |
| Logic Family | — | CMOS |
| Maximum Operating Frequency | — | 420.17 MHz |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Embedded Memory | — | TriMatrix RAM blocks |
| DSP Blocks | — | Yes (dedicated multiplier/accumulator) |
| PLLs | — | Yes (on-die) |