EP1S30F1020C7 vs EP1S30F1020C7N Vergleich
Detaillierter Direktvergleich von EP1S30F1020C7 von Altera und EP1S30F1020C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S30F1020C7 | EP1S30F1020C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $575,00 | $215,00 |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 32470 | — |
| Logic Array Blocks (LABs) | 3247 | — |
| Number of I/O | 726 | — |
| Maximum Internal Frequency | 420.17 MHz | — |
| Versorgungsspannung | 1.5 V | — |
| Betriebstemperatur | 0 C to 85 C | 0 C to +85 C (commercial extended) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Logic Family | CMOS | — |
| Package Type | FC-FBGA-1020 (flip-chip) | 1020-ball FineLine BGA (FC-FBGA) |
| Package Dimensions | 33 x 33 mm, 1 mm pitch | 33 x 33 mm |
| Pin-Anzahl | 1020 | — |
| Number of Terminals | 1020 | — |
| Terminal Form | Ball | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Configuration Method | SRAM (AS / AP / PS / JTAG) | — |
| Speed Grade | C7 (medium speed bin) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance from verified data not confirmed] | Compliant |
| Family | — | Stratix (1.5 V core) |
| Logic Elements | — | 32,470 |
| Total Block RAM Bits | — | 3,317,184 |
| User I/O Count | — | 726 |
| LABs (Logic Array Blocks) | — | 3247 |
| Max Internal Frequency | — | 420.17 MHz |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| Ball Pitch | — | 1.0 mm |
| MSL-Level | — | 3 (168 hours) |
| Peak Reflow Temperature Max Time | — | 40 s |