EP1S30F1020C7 vs EP1S30F1020C7N 对比
详细并排对比 EP1S30F1020C7 出自 Altera 和 EP1S30F1020C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S30F1020C7 | EP1S30F1020C7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $575.00 | $215.00 |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 32470 | — |
| Logic Array Blocks (LABs) | 3247 | — |
| Number of I/O | 726 | — |
| Maximum Internal Frequency | 420.17 MHz | — |
| 电源电压 | 1.5 V | — |
| 工作温度 | 0 C to 85 C | 0 C to +85 C (commercial extended) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Logic Family | CMOS | — |
| Package Type | FC-FBGA-1020 (flip-chip) | 1020-ball FineLine BGA (FC-FBGA) |
| Package Dimensions | 33 x 33 mm, 1 mm pitch | 33 x 33 mm |
| 引脚数量 | 1020 | — |
| Number of Terminals | 1020 | — |
| Terminal Form | Ball | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| Configuration Method | SRAM (AS / AP / PS / JTAG) | — |
| Speed Grade | C7 (medium speed bin) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance from verified data not confirmed] | Compliant |
| Family | — | Stratix (1.5 V core) |
| Logic Elements | — | 32,470 |
| Total Block RAM Bits | — | 3,317,184 |
| User I/O Count | — | 726 |
| LABs (Logic Array Blocks) | — | 3247 |
| Max Internal Frequency | — | 420.17 MHz |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| Ball Pitch | — | 1.0 mm |
| MSL 等级 | — | 3 (168 hours) |
| Peak Reflow Temperature Max Time | — | 40 s |