EP1S40F1020C6 vs EP1S40F1020C5GA Vergleich
Detaillierter Direktvergleich von EP1S40F1020C6 von Altera und EP1S40F1020C5GA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S40F1020C6 | EP1S40F1020C5GA |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.380,00 | $171,00 |
| Family | Stratix (original, EP1S) | — |
| Logic Elements (LE) | 41,250 | 41,250 |
| Logic Array Blocks (LABs) | 4,125 | — |
| Embedded Memory Bits | 3,423,744 bits (TriMatrix: M512 + M4K + M-RAM) | — |
| Maximum User I/O | 773 | — |
| Gehäuse | 1020-BBGA, FC-FBGA, 33 x 33 mm, 1.0 mm pitch | 1020-BBGA (FineLine BGA) |
| Process Technology | 0.13 µm CMOS | — |
| Core Voltage | 1.5 V | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | 0C to +85C (Commercial) |
| Maximum Frequency | 450.05 MHz | — |
| Supply Voltage (Core) | 1.5 V | [DATA_NEEDED: VCCINT value] |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL, PCI, PCI-X | — |
| Montageart | Surface Mount (FCBGA) | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating from datasheet] | [DATA_NEEDED: MSL rating] |
| RoHS-Status | [DATA_NEEDED: RoHS status from official datasheet] | Unknown - non-GA suffix commercial part |
| Series | — | Stratix |
| Total RAM Bits | — | 3,423,744 |
| User I/O Count | — | 773 |
| Speed Grade | — | C5 |
| Process Node | — | 0.13 µm CMOS with 9-layer metal |
| I/O Bank Count | — | [DATA_NEEDED: bank count] |
| DSP Blocks | — | Embedded multiplier blocks (count per Stratix datasheet family) |
| PLL Count | — | Up to 12 enhanced PLLs (per Stratix family) |
| High-Speed Transceivers | — | Up to 12 channels (per Stratix family, variant dependent) |
| Configuration Method | — | JTAG, Passive Serial, Altera EPC device |
| Lead-Free | — | Yes (per Altera/Intel policy at release) |