EP1S60F1020I6GB vs EP1S60F1020C6N Vergleich
Detaillierter Direktvergleich von EP1S60F1020I6GB von Intel und EP1S60F1020C6N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP1S60F1020I6GB - Stratix FPGA 57K LE, 1020-BGA, Industrial | Intel (Altera)
EP1S60F1020I6GB ObsoleteSpezifikationsvergleich
| Parameter | EP1S60F1020I6GB | EP1S60F1020C6N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4.200,00 | $195,00 |
| Family | Stratix (First-generation) | Stratix (EP1S) |
| Logic Elements | 57,120 | — |
| Approximate Logic Array Blocks | 6,570 | — |
| Embedded Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| Gehäuse | 1020-ball FCBGA (33 x 33 mm, 1.0 mm pitch) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Betriebstemperatur | -40C to +100C (industrial, I6 grade) | 0°C to +85°C (Commercial) |
| Versorgungsspannung | Multi-rail (core 1.5 V, I/O 1.5/1.8/2.5/3.3 V per bank) | Per datasheet (Stratix Device Handbook Vol. 1) |
| Process Technology | 0.13 µm CMOS | — |
| DSP Blocks | Yes (9 x 9 multipliers with 36-bit accumulators) | — |
| PLLs | Yes (multiple, for clock management) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| MSL-Level | 3 (168 hours, JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| RoHS-Status | Compliant (GB suffix) | Compliant (per 'N' suffix) |
| Lead-Free | Yes | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Speed Grade | — | C6 (mid-tier) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |