EP1S60F1020I6GB vs EP1S60F1020C6N 对比

详细并排对比 EP1S60F1020I6GB 出自 Intel 和 EP1S60F1020C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S60F1020I6GB EP1S60F1020C6N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4,200.00 $195.00
Family Stratix (First-generation) Stratix (EP1S)
Logic Elements 57,120 —
Approximate Logic Array Blocks 6,570 —
Embedded Memory Bits 5,215,104 —
Maximum User I/O 773 —
封装 1020-ball FCBGA (33 x 33 mm, 1.0 mm pitch) —
安装类型 Surface Mount Surface Mount (BGA)
工作温度 -40C to +100C (industrial, I6 grade) 0°C to +85°C (Commercial)
电源电压 Multi-rail (core 1.5 V, I/O 1.5/1.8/2.5/3.3 V per bank) Per datasheet (Stratix Device Handbook Vol. 1)
Process Technology 0.13 µm CMOS —
DSP Blocks Yes (9 x 9 multipliers with 36-bit accumulators) —
PLLs Yes (multiple, for clock management) —
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG —
MSL 等级 3 (168 hours, JEDEC J-STD-020) [DATA_NEEDED: MSL rating]
RoHS 状态 Compliant (GB suffix) Compliant (per 'N' suffix)
Lead-Free Yes —
Series — Stratix
Logic Elements (LEs) — 57,120
Logic Cells — 6,570 blocks (per chipdig datasheet summary)
Embedded RAM (Total Bits) — 5,215,104 bits
Embedded Multipliers — 773 (18x18)
Maximum User I/O Pins — Per datasheet, package-dependent (F1020 variant)
Package Type — 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch
Logic Family / Process — CMOS, 0.13 µm
Speed Grade — C6 (mid-tier)
Lead-Free / Pb-Free — Yes (suffix 'N')
Configuration — JTAG / Passive Serial / Fast Passive Parallel via MSEL pins
PLL Count — 12 (per Stratix family datasheet)
Memory Block Types — TriMatrix (M512, M4K, M-RAM)

数据手册与资源

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