EP1SGX25DF1020C4 vs EP1SGX25DF1020C6ESL Vergleich
Detaillierter Direktvergleich von EP1SGX25DF1020C4 von Intel und EP1SGX25DF1020C6ESL von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoleteSpezifikationsvergleich
| Parameter | EP1SGX25DF1020C4 | EP1SGX25DF1020C6ESL |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.180,00 | $1.095,00 |
| Family | Stratix GX | Stratix GX |
| Series | EP1SGX25 | — |
| Logic Elements | 25,660 | 25,660 |
| Embedded Memory | 1,944 Kbit | — |
| DSP Blocks | 80 (18x18-bit multipliers) | Yes (embedded DSP blocks) |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V | 1.5 V |
| Speed Grade | C4 | C6 |
| Betriebstemperatur | 0C to +85C (commercial) | — |
| Gehäuse | 1020-ball FineLine BGA (FBGA) | 1020-BBGA (FineLine BGA) |
| Process | 0.13 um CMOS SRAM | — |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| PLLs | Yes (clock management) | — |
| Configuration | JTAG, Passive Serial, Active Serial | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Total RAM Bits | — | 1,944,576 bits |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Betriebs-Sperrschichttemperatur | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| Transceivers | — | Embedded multi-gigabit transceivers (per Stratix GX family) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |