EP1SGX25DF1020C4 vs EP1SGX25DF1020C6ESL 比較
詳細な並列比較: EP1SGX25DF1020C4 メーカー: Intel および EP1SGX25DF1020C6ESL メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL Obsolete仕様比較
| パラメータ | EP1SGX25DF1020C4 | EP1SGX25DF1020C6ESL |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,180.00 | $1,095.00 |
| Family | Stratix GX | Stratix GX |
| Series | EP1SGX25 | — |
| Logic Elements | 25,660 | 25,660 |
| Embedded Memory | 1,944 Kbit | — |
| DSP Blocks | 80 (18x18-bit multipliers) | Yes (embedded DSP blocks) |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V | 1.5 V |
| Speed Grade | C4 | C6 |
| 動作温度 | 0C to +85C (commercial) | — |
| パッケージ | 1020-ball FineLine BGA (FBGA) | 1020-BBGA (FineLine BGA) |
| Process | 0.13 um CMOS SRAM | — |
| I/O Standards | LVTTL, LVCMOS, LVDS, SSTL, HSTL | — |
| PLLs | Yes (clock management) | — |
| Configuration | JTAG, Passive Serial, Active Serial | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS status] |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Total RAM Bits | — | 1,944,576 bits |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| 動作接合温度 | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| Transceivers | — | Embedded multi-gigabit transceivers (per Stratix GX family) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |