EP1SGX25DF1020C6ESL vs EP1SGX25DF1020C5ES Vergleich
Detaillierter Direktvergleich von EP1SGX25DF1020C6ESL von Altera und EP1SGX25DF1020C5ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoleteAltera
EP1SGX25DF1020C5ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C5ES ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1SGX25DF1020C6ESL | EP1SGX25DF1020C5ES |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.095,00 | $171,00 |
| Family | Stratix GX | — |
| Logic Elements | 25,660 | — |
| Total RAM Bits | 1,944,576 bits | — |
| User I/O Pins | 607 | — |
| LABs/CLBs | 2,566 | — |
| Gehäuse | 1020-BBGA (FineLine BGA) | — |
| Core Voltage | 1.5 V | — |
| Betriebs-Sperrschichttemperatur | 0 C to 85 C | — |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Process Node | 0.13 um CMOS | — |
| Transceivers | Embedded multi-gigabit transceivers (per Stratix GX family) | — |
| DSP Blocks | Yes (embedded DSP blocks) | — |
| Speed Grade | C6 | C5 |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) | — |
| Device Family | — | Stratix GX |
| Logic Family | — | CMOS |
| Logic Elements (LEs) | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Embedded Memory | — | 1,944,576 bits |
| Process Technology | — | 130 nm |
| Core Supply Voltage | — | 1.5 V |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.00 mm |
| Lead-Free | — | Yes |
| Betriebstemperatur | — | 0 °C to 85 °C (commercial) |
| Part Variant Suffix | — | ES (Engineering Sample) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Passive Serial |