EP1SGX40FF1020I6 vs EP1SGX40FF1020C7 Vergleich
Detaillierter Direktvergleich von EP1SGX40FF1020I6 von Altera und EP1SGX40FF1020C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA
EP1SGX40FF1020C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP1SGX40FF1020I6 | EP1SGX40FF1020C7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $950,00 | $750,00 |
| Series | Stratix® GX | Stratix GX |
| Family | EP1SGX40 | Stratix GX (EP1SGX40) |
| Logic Elements | 41,250 | — |
| Embedded Memory | 3,423,744 bits | — |
| User I/Os | 624 | — |
| Logic Array Blocks (LABs) | 41,250 | — |
| Gehäuse | 1020-ball FineLine BGA | 1020-ball FC-FBGA (S-PBGA-B1020) |
| Montageart | Surface Mount | Surface Mount |
| Core Voltage (VCCINT) | 1.5 V ±0.15 V | — |
| Betriebstemperatur | -40 °C to +100 °C (Industrial) | 0 °C to 85 °C (commercial) |
| Temperature Grade | I (Industrial) | — |
| Transceiver Channels | Up to 20 channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Transceiver Technology | CDR with embedded SERDES | — |
| Process Technology | CMOS | CMOS |
| Configuration | SRAM-based LUT | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Logic Elements (LE) | — | 41,250 |
| Configurable Logic Blocks (CLB) | — | 4,125 |
| Embedded Memory (bits) | — | 3,423,744 |
| User I/O Pins | — | 624 |
| Number of Logic Array Blocks (LAB) | — | 4,125 |
| Number of I/O Banks | — | 12 |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V (nominal 1.5 V) |
| Speed Grade | — | 7 (-7, mid-speed) |
| Package Dimensions | — | 33 mm × 33 mm |
| Ball Pitch | — | 1.00 mm |
| Configuration Modes | — | PS, PPS, PPA, JTAG, AS |
| DSP Blocks (9-bit) | — | 176 |
| PLLs | — | 8 enhanced + per-transceiver PLLs |