EP20K1000CB652C8ES vs EP20K200CB652C7ES Vergleich
Detaillierter Direktvergleich von EP20K1000CB652C8ES von Intel und EP20K200CB652C7ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K1000CB652C8ES - APEX 20KC FPGA 1M Gates 652-BGA | Intel
EP20K1000CB652C8ES ⚠ Letzte BestellmöglichkeitAltera
EP20K200CB652C7ES - APEX 20K 200K FPGA 652-BGA | Altera/Intel
EP20K200CB652C7ES ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K1000CB652C8ES | EP20K200CB652C7ES |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $220,00 | $275,00 |
| Family | APEX 20KC | APEX 20K |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements | 38,400 | 8,320 |
| System Gates | 1,000,000 (1M) | — |
| Embedded Memory (RAM bits) | 327,680 (plus 1,521,600 including parity) | — |
| Embedded System Blocks (ESBs) | 88 | — |
| User I/Os | 488 | — |
| PLLs | 4 | — |
| DLLs / LVDS Channels | 4 LVDS | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | — |
| Max Internal Frequency | 301.21 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Gehäuse | 652-BGA (FCBGA, 45 x 45 mm, 1.27 mm pitch) | 652-BGA |
| Betriebstemperatur | 0 °C to 85 °C (Commercial, C8 speed grade) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| Embedded System Block (ESB) RAM | — | 106,496 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for 652-BGA] |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Speed Grade | — | -7 |
| Operating Temperature (Commercial) | — | 0 °C to +85 °C |
| Montageart | — | Surface Mount |
| Configuration Method | — | SRAM (volatile, requires external PROM on power-up) |
| PLL Count | — | Up to 8 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS |
| JTAG (IEEE 1149.1) | — | Yes (boundary-scan) |
| Configuration Device Compatibility | — | EPC2, EPC8, EPC16, EPC64, microprocessor |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | — | [DATA_NEEDED: moisture sensitivity level] |