EP20K1000CB652C8ES vs EP20K200CB652C7ES Comparación
Comparación detallada lado a lado de EP20K1000CB652C8ES por Intel y EP20K200CB652C7ES por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP20K1000CB652C8ES - APEX 20KC FPGA 1M Gates 652-BGA | Intel
EP20K1000CB652C8ES ⚠ Última compraAltera
EP20K200CB652C7ES - APEX 20K 200K FPGA 652-BGA | Altera/Intel
EP20K200CB652C7ES ⚠ Última compraComparación de especificaciones
| Parámetro | EP20K1000CB652C8ES | EP20K200CB652C7ES |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $220,00 | $275,00 |
| Family | APEX 20KC | APEX 20K |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements | 38,400 | 8,320 |
| System Gates | 1,000,000 (1M) | — |
| Embedded Memory (RAM bits) | 327,680 (plus 1,521,600 including parity) | — |
| Embedded System Blocks (ESBs) | 88 | — |
| User I/Os | 488 | — |
| PLLs | 4 | — |
| DLLs / LVDS Channels | 4 LVDS | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | — |
| Max Internal Frequency | 301.21 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Encapsulado | 652-BGA (FCBGA, 45 x 45 mm, 1.27 mm pitch) | 652-BGA |
| Temperatura de funcionamiento | 0 °C to 85 °C (Commercial, C8 speed grade) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| Embedded System Block (ESB) RAM | — | 106,496 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count for 652-BGA] |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Speed Grade | — | -7 |
| Operating Temperature (Commercial) | — | 0 °C to +85 °C |
| Tipo de montaje | — | Surface Mount |
| Configuration Method | — | SRAM (volatile, requires external PROM on power-up) |
| PLL Count | — | Up to 8 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS |
| JTAG (IEEE 1149.1) | — | Yes (boundary-scan) |
| Configuration Device Compatibility | — | EPC2, EPC8, EPC16, EPC64, microprocessor |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Nivel MSL | — | [DATA_NEEDED: moisture sensitivity level] |