EP20K1000EBI652-2 vs EP20K1000EBC652-2X Vergleich
Detaillierter Direktvergleich von EP20K1000EBI652-2 von Altera und EP20K1000EBC652-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoleteAltera
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X NrndSpezifikationsvergleich
| Parameter | EP20K1000EBI652-2 | EP20K1000EBC652-2X |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $105,00 | $99,00 |
| Device Family | APEX 20KE | — |
| Logic Elements | 38,400 | — |
| Typical Gates | 1,000,000 | 1,000,000 system gates |
| Maximum User I/O | 488 | 488 |
| Gehäuse | BGA-652 (FineLine BGA, 45 x 45 mm) | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) |
| Ball Pitch | 1.27 mm | — |
| Speed Grade | -2 | — |
| Betriebstemperaturbereich | Industrial -40C to +100C | — |
| Supply Voltage (Core) | 1.8 V | — |
| Process Technology | 0.18 micrometer CMOS, all-layer copper | 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS |
| Embedded System Block Memory | [DATA_NEEDED: ESB memory size] | — |
| Embedded Multiplier/Accumulator Blocks | [DATA_NEEDED: number of multiplier blocks] | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | 350 MHz | — |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | Compliant |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Family | — | APEX-20KE |
| Device Logic Elements | — | 38,400 |
| Embedded Memory Bits | — | 327,680 bits |
| User I/O Pins | — | 488 |
| Internal Maximum Frequency | — | 350 MHz |
| Logic Blocks / Macros | — | 2,560 macros |
| PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| Betriebstemperatur | — | 0 °C to +85 °C (commercial) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Altera configuration |