EP20K1000EFI672-2X vs EP20K1000EBC652-2X Vergleich
Detaillierter Direktvergleich von EP20K1000EFI672-2X von Intel und EP20K1000EBC652-2X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K1000EBC652-2X - 1M Gate APEX-20KE FPGA, 488 I/O, 652-BGA | Altera (Intel)
EP20K1000EBC652-2X NrndSpezifikationsvergleich
| Parameter | EP20K1000EFI672-2X | EP20K1000EBC652-2X |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $305,00 | $99,00 |
| Family | APEX-20KE | APEX-20KE |
| Device Type | SPLD / FPGA | — |
| Logic Elements / Cells | 38400 | — |
| System Gates | 1,000,000 | — |
| Number of Macros | 2560 | — |
| Embedded Memory (Bits) | 327680 | — |
| User I/Os | 508 | — |
| Number of I/O Banks | [DATA_NEEDED: I/O banks] | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V | — |
| Betriebstemperatur | 0C to +85C | 0 °C to +85 °C (commercial) |
| Package Type | 672-BBGA (FineLine BGA, 45 x 45 mm, 1.27 mm pitch) | — |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | 0.15 micron all-layer copper-metal | 0.22 µm (some sources 0.15 µm) all-layer copper-metal CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| PLL Count | 4 | — |
| Speed Grade | -2X | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Device Logic Elements | — | 38,400 |
| Typical Gates | — | 1,000,000 system gates |
| Embedded Memory Bits | — | 327,680 bits |
| User I/O Pins | — | 488 |
| Maximum User I/O | — | 488 |
| Internal Maximum Frequency | — | 350 MHz |
| Logic Blocks / Macros | — | 2,560 macros |
| PLLs | — | 4 |
| Gehäuse | — | 652-pin FCBGA / PBGA (45 x 45 mm, 1.27 mm pitch) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Altera configuration |