EP20K100CQ240C7 vs EP20K100CQ240C9 Vergleich

Detaillierter Direktvergleich von EP20K100CQ240C7 von Altera und EP20K100CQ240C9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP20K100CQ240C9 EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP20K100CQ240C7 EP20K100CQ240C9
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $92,00 $99,50
Family APEX-20K APEX 20K (SRAM-based FPGA)
Device Type FPGA (Field Programmable Gate Array) —
System Gates 100,000 —
Logic Elements 53,248 4,160
Embedded Memory Bits 4,160 —
Maximum User I/O Pins 189 —
Package Type 240-BFQFP 240-BQFP (QFP-240)
Speed Grade C7 C9 (-9 commercial)
Betriebstemperatur 0C to +85C (commercial) 0°C to +85°C (commercial)
Supply Voltage - Core [DATA_NEEDED: core voltage] —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL (per family datasheet) LVTTL, LVCMOS, PCI, GTL
Number of PLLs 4 (per APEX-20K family datasheet) 4
Embedded System Blocks (ESBs) Yes (per APEX-20K family) —
Montageart Surface Mount Surface Mount
RoHS-Status unknown [DATA_NEEDED: RoHS compliance status]
Lead-Free unknown —
MSL-Level [DATA_NEEDED: MSL rating] —
Programming Tool Altera Quartus / MAX+PLUS II (per family) —
Series — APEX 20K
Typical Gates — 100,000
Embedded Memory (RAM bits) — 53,248
User I/O Pins — 189
Process Technology — 0.22 µm CMOS SRAM
Programming Method — In-system SRAM (volatile)
Configuration Method — Serial/Passive Parallel/Byte-wide JTAG
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT core voltage]
Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO I/O voltage]
JTAG (IEEE 1149.1) Support — Yes

Datenblätter & Ressourcen

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