EP20K100CQ240C7 vs EP20K100CQ240C9 对比

详细并排对比 EP20K100CQ240C7 出自 Altera 和 EP20K100CQ240C9 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP20K100CQ240C9 EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 ⚠ 最后一次采购

规格对比

参数 EP20K100CQ240C7 EP20K100CQ240C9
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $92.00 $99.50
Family APEX-20K APEX 20K (SRAM-based FPGA)
Device Type FPGA (Field Programmable Gate Array) —
System Gates 100,000 —
Logic Elements 53,248 4,160
Embedded Memory Bits 4,160 —
Maximum User I/O Pins 189 —
Package Type 240-BFQFP 240-BQFP (QFP-240)
Speed Grade C7 C9 (-9 commercial)
工作温度 0C to +85C (commercial) 0°C to +85°C (commercial)
Supply Voltage - Core [DATA_NEEDED: core voltage] —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL (per family datasheet) LVTTL, LVCMOS, PCI, GTL
Number of PLLs 4 (per APEX-20K family datasheet) 4
Embedded System Blocks (ESBs) Yes (per APEX-20K family) —
安装类型 Surface Mount Surface Mount
RoHS 状态 unknown [DATA_NEEDED: RoHS compliance status]
Lead-Free unknown —
MSL 等级 [DATA_NEEDED: MSL rating] —
Programming Tool Altera Quartus / MAX+PLUS II (per family) —
Series — APEX 20K
Typical Gates — 100,000
Embedded Memory (RAM bits) — 53,248
User I/O Pins — 189
Process Technology — 0.22 µm CMOS SRAM
Programming Method — In-system SRAM (volatile)
Configuration Method — Serial/Passive Parallel/Byte-wide JTAG
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT core voltage]
Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO I/O voltage]
JTAG (IEEE 1149.1) Support — Yes

数据手册与资源

浏览全部产品 创建 BOM 获取报价