EP20K100ETC144-1N vs EP20K100EFC144-1 Vergleich

Detaillierter Direktvergleich von EP20K100ETC144-1N von Altera und EP20K100EFC144-1 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K100ETC144-1N EP20K100EFC144-1
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $55,80 $61,75
Family APEX-20KE —
Logic Elements 53248 4,160
Logic Cells 4160 —
System Gates 100000 —
User I/Os 92 93
Gehäuse 144-LQFP (TQFP) —
Process Technology 0.22 µm CMOS 0.15-µm all-layer copper
Core Voltage 1.8 V —
Betriebstemperatur 0 °C to +85 °C 0 °C to 85 °C (commercial)
Embedded Array Blocks (EABs) Yes (32-bit x 2K RAM/ROM/FIFO) —
Configuration Interface JTAG (IEEE 1149.1) / IEEE 1532 ISC —
Montageart Surface Mount Surface Mount
RoHS-Status Unknown [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Programming Software MAX+PLUS II / Quartus II (legacy) —
Device Series APEX 20K 416 Macro 92 IOs —
Device Family — APEX 20KE
Device Type — FPGA (Field Programmable Gate Array)
Typical Gates — 100,000
Maximum System Gates — 263,000
Embedded System Blocks (ESBs) — Yes (memory + dedicated logic)
Propagation Delay — 1.6 ns
PLLs — 4
Package Type — 144-ball FBGA (13x13 mm, 1.0 mm pitch)
Core Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Voltage Support — 1.8 V / 2.5 V / 3.3 V (multiVolt I/O)
Configuration Method — SRAM (volatile) - external boot PROM required
Boundary-Scan Support — IEEE 1149.1 (JTAG)

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