EP20K100QC208-1 vs EP20K100QC208-2 Vergleich

Detaillierter Direktvergleich von EP20K100QC208-1 von Altera und EP20K100QC208-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K100QC208-1 EP20K100QC208-2
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $21,20 $29,90
Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) Field Programmable Gate Array (FPGA)
Equivalent Logic Gates 100,000 —
Typical Gates 26,624 —
Logic Elements / Cells 4,160 4160
Embedded RAM 53,248 bits —
Maximum Operating Frequency 250 MHz —
Propagation Delay (tPD) 1.6 ns —
Speed Grade -1 —
Supply Voltage (Core) 2.5 V —
Process Technology 0.22 µm CMOS —
Number of PLLs 4 —
Gehäuse PQFP-208 (Plastic Quad Flat Pack) —
Pin-Anzahl 208 —
Montageart Surface Mount Surface Mount
Betriebstemperatur 0 °C to +85 °C (commercial) 0°C to 85°C (TJ)
User I/Os (max) [DATA_NEEDED: exact user-IO count for PQFP-208] —
Configuration SRAM-based, volatile —
RoHS-Status unknown unknown
Manufacturer — Altera
Product Series — APEX-20K
Number of LABs / CLBs — 416
Total RAM Bits — 53248
Number of User I/Os — 159
Number of Gates — 263000
Gehäuse / Bauform — 208-BFQFP (208-PQFP 28x28)
Terminal Form — Gull wing
Number of Terminals — 208
Supply Voltage (VCC) — 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet)
I/O Standard Support — [DATA_NEEDED: I/O standard support]
Maximum Propagation Delay (-2 speed grade) — [DATA_NEEDED: max tPD for -2 speed grade]
Configuration Technology — [DATA_NEEDED: configuration technology details]
MSL-Level — [DATA_NEEDED: MSL level]
Product Lifecycle — NRND / legacy source through Rochester Electronics

Datenblätter & Ressourcen

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