EP20K100QC208-1 vs EP20K100QC208-2 对比

详细并排对比 EP20K100QC208-1 出自 Altera 和 EP20K100QC208-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100QC208-1 EP20K100QC208-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $21.20 $29.90
Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) Field Programmable Gate Array (FPGA)
Equivalent Logic Gates 100,000 —
Typical Gates 26,624 —
Logic Elements / Cells 4,160 4160
Embedded RAM 53,248 bits —
Maximum Operating Frequency 250 MHz —
Propagation Delay (tPD) 1.6 ns —
Speed Grade -1 —
Supply Voltage (Core) 2.5 V —
Process Technology 0.22 µm CMOS —
Number of PLLs 4 —
封装 PQFP-208 (Plastic Quad Flat Pack) —
引脚数量 208 —
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +85 °C (commercial) 0°C to 85°C (TJ)
User I/Os (max) [DATA_NEEDED: exact user-IO count for PQFP-208] —
Configuration SRAM-based, volatile —
RoHS 状态 unknown unknown
Manufacturer — Altera
Product Series — APEX-20K
Number of LABs / CLBs — 416
Total RAM Bits — 53248
Number of User I/Os — 159
Number of Gates — 263000
封装 / 外壳 — 208-BFQFP (208-PQFP 28x28)
Terminal Form — Gull wing
Number of Terminals — 208
Supply Voltage (VCC) — 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet)
I/O Standard Support — [DATA_NEEDED: I/O standard support]
Maximum Propagation Delay (-2 speed grade) — [DATA_NEEDED: max tPD for -2 speed grade]
Configuration Technology — [DATA_NEEDED: configuration technology details]
MSL 等级 — [DATA_NEEDED: MSL level]
Product Lifecycle — NRND / legacy source through Rochester Electronics

数据手册与资源

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