EP20K100QI240-2N vs EP20K100QC240-3N Vergleich

Detaillierter Direktvergleich von EP20K100QI240-2N von Altera und EP20K100QC240-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP20K100QI240-2N EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N Obsolete

Spezifikationsvergleich

Parameter EP20K100QI240-2N EP20K100QC240-3N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $0,00 $0,00
Product Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) FPGA
Total System Gates 100K —
Logic Elements / Cells 4160 —
Embedded RAM Bits (max) 53248 —
Number of User I/Os 189 —
Number of Dedicated Inputs 4 —
Core Supply Voltage 2.5 V nominal (2.375 V to 2.625 V) —
Process Technology 0.22 um CMOS —
Maximum Internal Clock Frequency 200 MHz —
Package Code FQFP —
Package Form 240-Pin PQFP, fine-pitch flatpack, square —
Package Body Size 32 mm x 32 mm (Length 32 mm) —
Terminal Pitch 0.5 mm —
Terminal Form Gull wing —
Montageart Surface Mount Surface Mount
MSL-Level [DATA_NEEDED: exact MSL for EP20K100QI240-2N; same PQFP listing indicates MSL 3] —
Operating Temperature Grade Industrial (I suffix) —
Core Supply Current [DATA_NEEDED: ICCINT] —
RoHS-Status [DATA_NEEDED: exact RoHS certificate] unknown
Family — APEX-20K
Gate Count — 100000 gates
Logic Cells — 4160 cells
User I/O — 189 I/O
Distributed Memory — 53248 bits
Macrocells — 416 macrocells
Versorgungsspannung — 2.375 V to 2.625 V
Nominal Supply — 2.5 V
Maximum Frequency — 167 MHz
Betriebstemperatur — 0 C to 85 C
Gehäuse — 240-BFQFP
Pin-Anzahl — 240 pins
Fabrication Process — 0.15 um all-layer copper-metal process
Package Pitch — 1.27 mm
Package Dimensions — 45 mm x 45 mm
AEC-Q100 — not_qualified

Datenblätter & Ressourcen

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