EP20K100QI240-2N vs EP20K100QC240-3N 对比

详细并排对比 EP20K100QI240-2N 出自 Altera 和 EP20K100QC240-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP20K100QI240-2N EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N - 100K Gate APEX 20K FPGA | Altera

EP20K100QI240-2N Obsolete

规格对比

参数 EP20K100QI240-2N EP20K100QC240-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $0.00 $0.00
Product Family APEX 20K —
Device Type FPGA (Field Programmable Gate Array) FPGA
Total System Gates 100K —
Logic Elements / Cells 4160 —
Embedded RAM Bits (max) 53248 —
Number of User I/Os 189 —
Number of Dedicated Inputs 4 —
Core Supply Voltage 2.5 V nominal (2.375 V to 2.625 V) —
Process Technology 0.22 um CMOS —
Maximum Internal Clock Frequency 200 MHz —
Package Code FQFP —
Package Form 240-Pin PQFP, fine-pitch flatpack, square —
Package Body Size 32 mm x 32 mm (Length 32 mm) —
Terminal Pitch 0.5 mm —
Terminal Form Gull wing —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: exact MSL for EP20K100QI240-2N; same PQFP listing indicates MSL 3] —
Operating Temperature Grade Industrial (I suffix) —
Core Supply Current [DATA_NEEDED: ICCINT] —
RoHS 状态 [DATA_NEEDED: exact RoHS certificate] unknown
Family — APEX-20K
Gate Count — 100000 gates
Logic Cells — 4160 cells
User I/O — 189 I/O
Distributed Memory — 53248 bits
Macrocells — 416 macrocells
电源电压 — 2.375 V to 2.625 V
Nominal Supply — 2.5 V
Maximum Frequency — 167 MHz
工作温度 — 0 C to 85 C
封装 — 240-BFQFP
引脚数量 — 240 pins
Fabrication Process — 0.15 um all-layer copper-metal process
Package Pitch — 1.27 mm
Package Dimensions — 45 mm x 45 mm
AEC-Q100 — not_qualified

数据手册与资源

浏览全部产品 创建 BOM 获取报价