EP20K200BC356-2XV vs EP20K200CB356C8N Vergleich

Detaillierter Direktvergleich von EP20K200BC356-2XV von Altera und EP20K200CB356C8N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K200BC356-2XV EP20K200CB356C8N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $45,00 $56,40
Family APEX-20K APEX 20KC
Series APEX-20K® EP20K200
Number of LABs/CLBs 832 —
Number of Logic Elements / Cells 8320 —
Total RAM Bits 106496 —
Number of I/O 277 —
Number of Gates 526000 —
Core Voltage Supply 2.375 V to 2.625 V —
Montageart Surface Mount —
Betriebstemperatur 0 °C to 85 °C (TJ) —
Gehäuse / Bauform 356-LBGA (Ball Grid Array) —
Speed Grade -2 —
Configuration Memory SRAM-based (volatile) —
Programming Interface JTAG (IEEE 1149.1) —
RoHS-Status [DATA_NEEDED: RoHS compliance flag] [DATA_NEEDED: RoHS compliance]
Device Type — SRAM-based LUT FPGA
System Gates — 200,000
Logic Elements (Cells) — 8,320
Maximum Internal Frequency — 301.21 MHz
Process Technology — 0.15 um CMOS
Propagation Delay (tpd) — 1.78 ns
Nominal Core Supply Voltage — 1.8 V
Core Supply Voltage Range — 1.71 V to 1.89 V
Number of User I/O Pins — 263
Number of Dedicated Inputs — 4
Total Macrocells / Output Functions — 263
Embedded Memory Bits — 106,496 bits
Number of PLLs — 4
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Differential Signaling — LVDS
Configuration Interface — Serial / JTAG (IEEE 1149.1)
Gehäuse — 356-ball LBGA
Operating Temperature (commercial "C") — 0 C to +85 C (TJ)
Terminal Finish ("N") — Lead-free / Pb-free
Feuchtigkeitsempfindlichkeitsgrad (MSL) — [DATA_NEEDED: MSL rating]

Datenblätter & Ressourcen

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