EP20K200BC356-2XV vs EP20K200CB356C8N 对比
详细并排对比 EP20K200BC356-2XV 出自 Altera 和 EP20K200CB356C8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EP20K200BC356-2XV - APEX-20K FPGA, 8320 LE, 356-BGA | Altera/Intel
EP20K200BC356-2XV Obsolete规格对比
| 参数 | EP20K200BC356-2XV | EP20K200CB356C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $45.00 | $56.40 |
| Family | APEX-20K | APEX 20KC |
| Series | APEX-20K® | EP20K200 |
| Number of LABs/CLBs | 832 | — |
| Number of Logic Elements / Cells | 8320 | — |
| Total RAM Bits | 106496 | — |
| Number of I/O | 277 | — |
| Number of Gates | 526000 | — |
| Core Voltage Supply | 2.375 V to 2.625 V | — |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0 °C to 85 °C (TJ) | — |
| 封装 / 外壳 | 356-LBGA (Ball Grid Array) | — |
| Speed Grade | -2 | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance flag] | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | SRAM-based LUT FPGA |
| System Gates | — | 200,000 |
| Logic Elements (Cells) | — | 8,320 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Process Technology | — | 0.15 um CMOS |
| Propagation Delay (tpd) | — | 1.78 ns |
| Nominal Core Supply Voltage | — | 1.8 V |
| Core Supply Voltage Range | — | 1.71 V to 1.89 V |
| Number of User I/O Pins | — | 263 |
| Number of Dedicated Inputs | — | 4 |
| Total Macrocells / Output Functions | — | 263 |
| Embedded Memory Bits | — | 106,496 bits |
| Number of PLLs | — | 4 |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Differential Signaling | — | LVDS |
| Configuration Interface | — | Serial / JTAG (IEEE 1149.1) |
| 封装 | — | 356-ball LBGA |
| Operating Temperature (commercial "C") | — | 0 C to +85 C (TJ) |
| Terminal Finish ("N") | — | Lead-free / Pb-free |
| 湿敏等级（MSL） | — | [DATA_NEEDED: MSL rating] |