EP20K200EBC356-1 vs EP20K200EBC356-1N Vergleich
Detaillierter Direktvergleich von EP20K200EBC356-1 von Altera und EP20K200EBC356-1N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K200EBC356-1 | EP20K200EBC356-1N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $142,00 | $171,00 |
| Family | APEX 20K (APEX 20KE) | APEX 20KE |
| System Gates | 200,000 | — |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum User I/Os | 277 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Internal Performance | Up to 367 MHz | — |
| Gehäuse | 356-ball LBGA (35 x 35 mm) | 356-BGA (LBGA, 35 x 35 mm) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Betriebstemperatur | 0 °C to 85 °C (Commercial) | 0 C to +85 C (commercial) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| On-chip Memory | Embedded System Blocks (ESB / SRAM) | — |
| Configuration Method | JTAG (ByteBlaster / MasterBlaster), passive serial | SRAM-based, in-system programmable |
| Development Software | Altera Quartus II | — |
| RoHS-Status | [DATA_NEEDED: RoHS status not stated in verified sources] | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | Obsolete / EOL | — |
| Series | — | APEX-20KE |
| Typical Gates | — | 200,000 |
| Number of Macrocells | — | 832 |
| User I/Os | — | 271 |
| Internal Frequency (max) | — | 367 MHz |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply Voltage | — | MultiVolt 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| MSL-Level | — | 3 (168 hours) |
| Logic Family / Architecture | — | CMOS, MultiCore (LUT + embedded memory) |